Moore's Law  

IBM and Samsung have developed a first-of-a-kind process to build silicon nanosheet transistors that will enable 5 nanometer chips. The resulting increase in performance will help accelerate artificial intelligence, the Internet of Things (IoT) and other data-intensive applications delivered in the cloud. The power savings alone might mean that the batteries in smartphones and other mobile products could last two to three times longer than today’s devices, before needing to be charged.

"The economic value that Moore’s Law generates is unquestionable. That’s where innovations such as this one come into play, to extend scaling not by traditional ways but coming up with innovative structures."

IBM and Samsung, have announced the development of an industry-first process to build silicon nanosheet transistors that will enable 5 nanometer (nm) chips.

The breakthrough means that silicon technology has yet again extended the potential of Moore's Law.

Less than two years after developing a 7nm test node chip with 20 billion transistors, the researchers involved have paved the way for 30 billion switches on a fingernail-sized chip.

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The resulting increase in performance will help accelerate artificial intelligence, the Internet of Things (IoT), and other data-intensive applications delivered in the cloud. The power savings could also mean that the batteries in smartphones and other mobile products could last two to three times longer than today’s devices, before needing to be charged.

“The economic value that Moore’s Law generates is unquestionable. That’s where innovations such as this one come into play, to extend scaling not by traditional ways but coming up with innovative structures,” says Mukesh Khare, vice president of semiconductor research for IBM Research.

Scientists working as part of the IBM-led Research Alliance at the SUNY Polytechnic Institute Colleges of Nanoscale Science and Engineering’s NanoTech Complex in Albany, NY achieved the breakthrough by using stacks of silicon nanosheets as the device structure of the transistor, instead of the standard FinFET architecture, which is the blueprint for the semiconductor industry up through 7nm node technology.

IBM scientists at the SUNY Polytechnic Institute Colleges of Nanoscale Science and Engineering’s NanoTech Complex in Albany, NY prepare test wafers with 5nm silicon nanosheet transistors, loaded into the front opening unified pod, or FOUPs, to test the process of building 5nm transistors using silicon nanosheets. Image Source - Connie Zhou / IBM

The silicon nanosheet transistor demonstration, as detailed in the Research Alliance paper Stacked Nanosheet Gate-All-Around Transistor to Enable Scaling Beyond FinFET, and published by VLSI, proves that 5nm chips are possible, more powerful, and not too far off in the future.

Pictured: a scan of IBM Research Alliance’s 5nm transistor, built using an industry-first process to stack silicon nanosheets as the device structure – achieving a scale of 30 billion switches on a fingernail-sized chip that will deliver significant power and performance enhancements over today’s state-of-the-art 10nm chips. Image Source - IBM

Gary Patton, CTO and Head of Worldwide R&D at GLOBALFOUNDRIES stated. “As we make progress toward commercializing 7nm in 2018 at our Fab 8 manufacturing facility, we are actively pursuing next-generation technologies at 5nm and beyond to maintain technology leadership and enable our customers to produce a smaller, faster, and more cost efficient generation of semiconductors.”

IBM Research has explored nanosheet semiconductor technology for more than 10 years. This work is the first in the industry to demonstrate the feasibility to design and fabricate stacked nanosheet devices with electrical properties better than FinFET architecture.

The scientists used the same Extreme Ultraviolet (EUV) lithography approach used to produce the 7nm test node and its 20 billion transistors to the nanosheet in the new transistor architecture. Using EUV lithography, the width of the nanosheets could be adjusted continuously, all within a single manufacturing process or chip design.

This adjustability allowed for the fine-tuning of performance and power for specific circuits – something not possible with today’s FinFET transistor architecture production.

Dr. Bahgat Sammakia, Interim President, SUNY Polytechnic Institute said that, “We believe that enabling the first 5nm transistor is a significant milestone for the entire semiconductor industry as we continue to push beyond the limitations of our current capabilities.”

Full implementation of this technology will still require 10 to 15 years of further development according to some reports.

The details of the process will be presented at the 2017 Symposia on VLSI Technology and Circuits conference in Kyoto, Japan.

SOURCE  IBM

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 Chemistry  

Silicon-oxide materials are found in nearly every electronic device and could hold many more applications and uses. With the discovery of a method to create new oxides, even more possibilities may be available.

Chemistry researchers at the University of Georgia have established new possibilities for silicon chemistry and the semiconductor industry with a study that succeeded in isolating silicon oxide fragments for the first time, at room temperature.

The study, published in the journal Nature Chemistry, gives details on the first time chemists have been able to trap molecular species of silicon oxides using a technique they developed in 2008. the researchers isolated the silicon oxide fragments by trapping them between stabilizing organic bases.

"We've found a backdoor to approaching molecular species that contain various silicon oxides."

"In [a] 2008 discovery, we were able to stabilize the disilicon molecule, which previously could only be studied at extremely low temperatures on a solid argon matrix," said Gregory H. Robinson, UGA Foundation Distinguished Professor of Chemistry and the study's co-author. "We demonstrated that these organic bases could stabilize a variety of extremely reactive molecules at room temperature."

In the periodic table, the columns, or groups, of elements generally share similar chemical properties. Group 14, for example, contains the element carbon, as well as silicon, the most carbon-like of all the elements. However, there are significant differences between the two. While the oxides of carbon, carbon dioxide and carbon monoxide are widely known, the molecular chemistry of corresponding silicon oxides is essentially unknown, due to the great reactivity of silicon-oxygen multiple bonds.

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Silicon monoxide, on the other hand, has been described as the most abundant silicon oxide in the universe but, terrestrially it is only persistent at high temperatures, about 1,200 degrees Celsius. Naturally abundant silica ((SiO2)n) exists on Earth as sand—a network solid wherein each silicon atom bonds to four oxygen atoms in a process that repeats infinitely.

The paper reports two new compounds containing Si2O3 and Si2O4 cores that the team was able to isolate using the carbene stabilization technique. This synthetic strategy allowed the team to "tame" the highly reactive silicon oxide moieties at room temperature.

The discovery breaks open an area of chemistry where difficulty with synthetics has limited the research activity. Silicon oxide materials are found in every electronic device and could hold many more applications and uses.

"Our technique seems to be an attractive means to approach a number of these highly reactive molecules," Robinson said. "We've found a backdoor to approaching molecular species that contain various silicon oxides."

"In our version of the famous quote by Robert F. Kennedy Jr., we ponder molecules that have never been synthesized, and we ask ‘why not?'" Robinson said.


SOURCE  University of Georgia

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 Semiconductors  

Scientists have developed what they believe is the thinnest-possible semiconductor, a new class of nanoscale materials made in sheets only three atoms thick.

R esearchers at the University of Washington have developed what they believe is the thinnest-possible semiconductor, a new class of nanoscale materials made in sheets only three atoms thick.

The scientists have demonstrated that two of these single-layer semiconductor materials can be connected in an atomically seamless fashion known as a heterojunction. This result could be the basis for next-generation flexible and transparent computing, better light-emitting diodes, or LEDs, and solar technologies.

“Heterojunctions are fundamental elements of electronic and photonic devices,” said senior author Xiaodong Xu, a UW assistant professor of materials science and engineering and of physics. “Our experimental demonstration of such junctions between two-dimensional materials should enable new kinds of transistors, LEDs, nanolasers, and solar cells to be developed for highly integrated electronic and optical circuits within a single atomic plane.”

The research was published online this week in Nature Materials.

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The researchers discovered that two flat semiconductor materials can be connected edge-to-edge with crystalline perfection. They worked with two single-layer, or monolayer, materials – molybdenum diselenide and tungsten diselenide – that have very similar structures, which was key to creating the composite two-dimensional semiconductor.

Collaborators from the electron microscopy center at the University of Warwick in England found that all the atoms in both materials formed a single honeycomb lattice structure, without any distortions or discontinuities. This provides the strongest possible link between two single-layer materials, necessary for flexible devices. Within the same family of materials it is feasible that researchers could bond other pairs together in the same way.

The researchers created the junctions in a small furnace at the UW. First, they inserted a powder mixture of the two materials into a chamber heated to 900 degrees Celsius (1,652 F). Hydrogen gas was then passed through the chamber and the evaporated atoms from one of the materials were carried toward a cooler region of the tube and deposited as single-layer crystals in the shape of triangles.

As seen under an optical microscope, the heterostructures have a triangular shape. The two different monolayer semiconductors can be recognized through their different colors. Image Source - University of Washington

After a while, evaporated atoms from the second material then attached to the edges of the triangle to create a seamless semiconducting heterojunction.

"Our experimental demonstration of such junctions between two-dimensional materials should enable new kinds of transistors, LEDs, nanolasers, and solar cells to be developed for highly integrated electronic and optical circuits within a single atomic plane."

“This is a scalable technique,” said Sanfeng Wu, a UW doctoral student in physics and one of the lead authors. “Because the materials have different properties, they evaporate and separate at different times automatically. The second material forms around the first triangle that just previously formed. That’s why these lattices are so beautifully connected.”

With a larger furnace, it would be possible to mass-produce sheets of these semiconductor heterostructures, the researchers said. On a small scale, it takes about five minutes to grow the crystals, with up to two hours of heating and cooling time.

“We are very excited about the new science and engineering opportunities provided by these novel structures,” said senior author David Cobden, a UW professor of physics. “In the future, combinations of two-dimensional materials may be integrated together in this way to form all kinds of interesting electronic structures such as in-plane quantum wells and quantum wires, superlattices, fully functioning transistors, and even complete electronic circuits.”

The researchers have already demonstrated that the junction interacts with light much more strongly than the rest of the monolayer, which is encouraging for optoelectric and photonic applications like solar cells.


SOURCE  University of Washington

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 Graphene  

Max Planck Institute for Polymer Research (MPI-P) researchers have succeeded in producing long, structurally well-defined graphene nanoribbons (GNRs) with semiconducting properties. The work could lead to transistors and solar cells that are far more effective than silicon.

R
esearchers from the Max Planck Institute for Polymer Research (MPI-P) working with Xinliang Feng and Klaus Müllen succeeded in producing remarkably long, structurally well-defined and liquid-phase-processable graphene nanoribbons (GNRs). This newly developed synthesis method was introduced in the scientific journal Nature Chemistry.

This synthesis method consists in putting together molecular building blocks to produce graphene ribbons in the desired shape and size. The key property of this material is displayed only afterwards: defect-free graphene ribbons show excellent semiconducting properties.

As a consequence, this nanomaterial could optimally be used in electronic devices such as transistors and be far more effective than the silicon currently in use.

"This is a great step to achieve graphene nanoribbons with unique properties and good solution processability by means of organic solution synthesis" research group leader Feng explains.

A worldwide scientific competition over the research and production of graphene has broken out. The European Commission is thoroughly involved: with a budget of nearly €1 billion over the next ten years, the research program Graphene Flagship  provides funding for the utilization of graphene. Scientists at the MPI-P have already made important progresses: since 2003, Klaus Müllen, director at the MPI-P, pursues the "bottom-up" approach to synthesize graphene ribbons from molecular building blocks. Mechanical methods ("top-down") or crystal growth do not reach the necessary precision and produce flawed results.

Graphene ribbons also have electronic bandgaps, which allow to control the movement of the electrons and the optical properties; a property that graphene – this highly praised wonder material – lacks. As a result, the charge carrier mobility of graphene ribbons is superior to that of silicon.

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As a replacement of silicon in electronic devices, batteries or solar cells, graphene ribbons are expected to boost the performance of such devices in the future. Thus, it will be crucial to know if they can be manufactured on an industrial scale with the help of this new solution-synthetized method. inherent transdisciplinary cooperation approach of the Institute played a decisive role in this recent research success.

The breakthrough made by the synthesis experts was only validated after numerous specific investigations carried by other workgroups of the MPI-P. Laser spectroscopic measurements showed that the graphene obtained in liquid phase has a high photoconductivity. Akimitsu Narita, a PhD student, who was significantly involved in the synthesis, could attest the existence of the bandgaps by investigating the ultraviolet absorption of the solution-synthetized graphene ribbons. Outside the MPI-P, other scientists - from the FU Berlin, the Netherlands, Britain, Denmark and Belgium - were also involved in analyzing the properties of this material.

The material will especially be the object of the fundamental research, to which the MPI-P is committed. The physical properties and their source will be microscopically and spectroscopically investigated to uncover further possible improvements and decisive properties.



SOURCE  Max Planck Institute for Polymer Research

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 Graphene  

Researchers have found that intrinsic ripples form on a sheet of graphene when it is placed on top of a semiconductor. The ripples further change the Schottky barrier height, affecting electron transport.

For all the promise of graphene as a material for next-generation electronics and quantum computing, scientists still don't know enough about this high-performance conductor to effectively control an electric current.

Graphene, a one-atom-thick layer of carbon, conducts electricity so efficiently that the electrons are difficult to control. And control will be necessary before this wonder material can be used to make nanoscale transistors or other devices.

Now, a new study by a research group at the University of Wisconsin-Milwaukee (UWM) will help.

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The group has identified new characteristics of electron transport in a two-dimensional sheet of graphene layered on top of a semiconductor.

The researchers demonstrated that when electrons are rerouted at the interface of the graphene and its semiconducting substrate, they encounter what's known as a Schottky barrier. If it's deep enough, electrons don't pass, unless rectified by applying an electric field – a promising mechanism for turning a graphene-based device on and off.

The group also found, however, another feature of graphene that affects the height of the barrier. Intrinsic ripples form on graphene when it is placed on top of a semiconductor.

UWM doctoral student Shivani Rajput, first author on the paper, shows a reconstructed image of graphene with the ripples clearly visible. Two postdoctoral researchers also worked on the project: Yaoyi Li (left) and Mingxing Chen. Image Source: Troye Fox

The research group, led by Lian Li and Michael Weinert, UWM professors of physics, and Li's graduate student Shivani Rajput, conducted their experiment with the semiconductor silicon carbide. The results were published recently in Nature Communications.

The ripples are analogous to the waviness of a sheet of paper that has been wetted and then dried. Except in this case, notes Weinert, the thickness of the sheet is less than one nanometer (a billionth of a meter).

"Our study says that ripples affect the barrier height and even if there's a small variation in it, the results will be a large change in the electron transport," says Li.

The barrier needs to be the same height across the whole sheet in order to ensure that the current is either on or off, he adds.

"This is a cautionary tale," says Weinert, whose calculations provided the theoretical analysis. "If you're going to use graphene for electronics, you will encounter this phenomenon that you will have to engineer around."

With multiple conditions affecting the barrier, more work is necessary to determine which semiconductors would be best suited to use for engineering a transistor with graphene.

The work also presents opportunity. The ability to control the conditions impacting the barrier will allow conduction in three dimensions, rather than along a simple plane. This 3D conduction will be necessary for scientists to create more complicated nano-devices, says Weinert.


SOURCE  University of Wisconsin - Milwaukee, via EurekAlert!

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 Moore's Law  

In a lucid set of videos, Professor Andrea Morello of the University of New South Wales, in Australia discusses how silicon transistor technology operates under Moore's Law.

It is central to the concept of the technological Singularity, and we mention it here often, but what does Moore's Law actually mean?

In a lucid set of videos (below), Professor Andrea Morello of the University of New South Wales, in Australia discusses how silicon transistor technology operates under Moore's Law.

As in the image above, Morello shows how a transistor is currently made in current semi-conductor technology.  Each transistor acts as a switch, connecting the source and drain non-mechanically. The distance between the source and drain is what has been reducing exponentially over time, allowing more transistors to fit on each chip.

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Currently, chips are mainly produced at the 22 nanometer distance.  At this level, there are about 50 silicon atoms between the source and drain.

The International Technology Roadmap for Semiconductors (ITRS) 2006 Front End Process Update indicates that equivalent physical oxide thickness will not scale below 0.5 nm (about twice the diameter of a silicon atom), which is the expected value at the 22 nm node. This is an indication that CMOS scaling in this area has reached a wall at this point, possibly disturbing Moore's law.

On the ITRS roadmap though, the successor to 22 nm technology will be 14 nm technology.

By 2020-2025 there will only be a handful of atoms between the source and gate and quantum mechanics will limit any further size two-dimensional size reductions.

One way Moore's Law will be overcome will be to create semiconductors into the third dimension, as is already being done with the Ivy Bridge chipset from Intel.

Morello then goes on to explain how the shrinking of silicon transistors to the atomic scale inherently introduces quantum mechanical effects. For Morello, quantum computers are not on the same evolutionary path as classical computers and Moore's Law.

Morello is an electrical engineer and a quantum physicist. He is Associate Professor in Quantum Nanosystems with the School of Electrical Engineering and Telecommunications, and a Program Manager in the ARC Centre of Excellence for Quantum Computation and Communication Technology (CQC2T). His research is aimed at building a quantum computer based on single spins in silicon.

Morello heads the Quantum Spin Control group at CQC2T. His research is at the forefront of quantum technologies, with the world-first demonstration of single-shot spin readout in silicon, and more recently the first spin quantum bits based on the electron and the nucleus of a single phosphorus atom in silicon. His group is actively developing advanced techniques to observe and control the interaction between two qubits and develop a quantum logic gate, as well as the transport of quantum information across a silicon crystal. Andrea and his team have quickly gained international recognition for their research breakthroughs, and collaborate with world-leading groups at Oxford University, Walter-Schottky Institute, Sandia National Laboratories, Purdue University and others.







SOURCE  Technyou, Veritasium

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