Anant Agarwal directs MIT’s vaunted Computer Science and Artificial Intelligence Laboratory, or CSAIL. Agarwal and his colleagues are figuring out how to build the computer chips of the future, looking a decade or two down the road. The aim is to do research that most people think is nuts. “If people say you’re not crazy, that means you’re not thinking far out enough.”
Agarwal has been at this a while, and periodically, when some of his pie-in-the-sky research becomes merely cutting-edge, he dons his serial entrepreneur hat and launches the technology into the world. His latest commercial venture is Tilera. The company’s specialty is squeezing cores onto chips — lots of cores. A core is a processor, the part of a computer chip that runs software and crunches data. Today’s high-end computer chips have as many as 16 cores. But Tilera’s top-of-the-line chip has 100. He applies Moore’s law and predicts that beyond the four or more cores on chips we now have (he’s already developed a 64-core chip), we’ll be seeing 1000 tiles per chip in the next five years or so
The idea is to make servers more efficient. If you pack lots of simple cores onto a single chip, you’re not only saving power. You’re shortening the distance between cores.
Today, Tilera sells chips with 16, 32, and 64 cores, and it’s scheduled to ship that 100-core monster later this year. Tilera provides these chips to Quanta, the huge Taiwanese original design manufacturer (ODM) that supplies servers to Facebook and — according to reports, Google. Quanta servers sold to the big web companies don’t yet include Tilera chips, as far as anyone is admitting. But the chips are on some of the companies’ radar screens.
Tilera grew out of a DARPA- and NSF-funded MIT project called RAW, which produced a prototype 16-core chip in 2002. The key idea was to combine a processor with a communications switch. Agarwal calls this creation a tile, and he’s able to build these many tiles into a piece of silicon, creating what’s known as a “mesh network.”
Tilera’s roadmap calls for its next generation of processors, code-named Stratton, to be released in 2013. The product line will expand the number of processors in both directions, down to as few as four and up to as many as 200 cores. The company is going from a 40-nm to a 28-nm process, meaning they’re able to cram more circuits in a given area. The chip will have improvements to interfaces, memory, I/O and instruction set, and will have more cache memory.
Agarwal isn’t stopping there. As Tilera churns out the 100-core chip, he’s leading a new MIT effort dubbed the Angstrom project. It’s one of four DARPA-funded efforts aimed at building exascale supercomputers. In short, it’s aiming for a chip with 1,000 cores.
Wired
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