Moore's Law  

IBM has announced it is investing $3 billion for R&D in two research programs to push the limits of chip technology and extend Moore’s law. The research programs are aimed at “7 nanometer and beyond” silicon technology and developing alternative technologies for post-silicon-era chips using entirely different approaches.

IBM has announced it is investing $3 billion over the next 5 years in two broad research and early stage development programs to push the limits of chip technology needed to meet the emerging demands of cloud computing and Big Data systems. These investments will push IBM's semiconductor innovations from today’s breakthroughs into the advanced technology leadership required for the future.

The first research program is aimed at so-called “7 nanometer and beyond” silicon technology that will address serious physical challenges that are threatening current semiconductor scaling techniques and will impede the ability to manufacture such chips.

The second is focused on developing alternative technologies for post-silicon era chips using entirely different approaches, which IBM scientists and other experts say are required because of the physical limitations of silicon based semiconductors.

IBM will be investing significantly in emerging areas of research including carbon nanoelectronics, silicon photonics, new memory technologies, and architectures that support quantum and cognitive computing.

"The question is not if we will introduce 7 nanometer technology into manufacturing, but rather how, when, and at what cost?"

These teams will focus on providing orders of magnitude improvement in system level performance and energy efficient computing. In addition, the company will continue to invest in the nanosciences and quantum computing--two areas of fundamental science where IBM has remained a pioneer for over three decades.

IBM Researchers and other semiconductor experts predict that while challenging, semiconductors show promise to scale from today's 22 nanometers down to 14 and then 10 nanometers in the next several years.  However, scaling to 7 nanometers and perhaps below, by the end of the decade will require significant investment and innovation in semiconductor architectures as well as invention of new tools and techniques for manufacturing.

"The question is not if we will introduce 7 nanometer technology into manufacturing, but rather how, when, and at what cost?" said John Kelly, senior vice president, IBM Research. "IBM engineers and scientists, along with our partners, are well suited for this challenge and are already working on the materials science and device engineering required to meet the demands of the emerging system requirements for cloud, big data, and cognitive systems. This new investment will ensure that we produce the necessary innovations to meet these challenges."

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Silicon transistors, tiny switches that carry information on a chip, have been made smaller year after year, but they are approaching a point of physical limitation. Their increasingly small dimensions, now reaching the nanoscale, will prohibit any gains in performance due to the nature of silicon and the laws of physics. Within a few more generations, classical scaling and shrinkage will no longer yield the sizable benefits of lower power, lower cost and higher speed processors that the industry has become accustomed to.

With virtually all electronic equipment today built on complementary metal–oxide–semiconductor (CMOS) technology, there is an urgent need for new materials and circuit architecture designs compatible with this engineering process as the technology industry nears physical scaling limits of the silicon transistor.

Beyond 7 nanometers, the challenges dramatically increase, requiring a new kind of material to power systems of the future, and new computing platforms to solve problems that are unsolvable or difficult to solve today. Potential alternatives include new materials such as carbon nanotubes, and non-traditional computational approaches such as neuromorphic computing, cognitive computing, machine learning techniques, and the science behind quantum computing.

IBM already holds over 500 patents for technologies that will drive advancements at 7nm and beyond silicon -- more than twice the nearest competitor. These continued investments will accelerate the invention and introduction into product development for IBM's highly differentiated computing systems for cloud, and big data analytics.

Quantum Computing

The most basic piece of information that a typical computer understands is a bit. Much like a light that can be switched on or off, a bit can have only one of two values: "1" or "0.” Described as superposition, this special property of qubits enables quantum computers to weed through millions of solutions all at once, while desktop PCs would have to consider them one at a time.

IBM is a world leader in superconducting qubit-based quantum computing science and is a pioneer in the field of experimental and theoretical quantum information, fields that are still in the category of fundamental science - but one that, in the long term, may allow the solution of problems that are today either impossible or impractical to solve using conventional machines. The team recently demonstrated the first experimental realization of parity check with three superconducting qubits, an essential building block for one type of quantum computer.

Neurosynaptic Computing

Bringing together nanoscience, neuroscience, and supercomputing, IBM and university partners have developed an end-to-end ecosystem including a novel non-von Neumann architecture, a new programming language, as well as applications. This novel technology allows for computing systems that emulate the brain's computing efficiency, size and power usage. IBM’s long-term goal is to build a neurosynaptic system with ten billion neurons and a hundred trillion synapses, all while consuming only one kilowatt of power and occupying less than two liters of volume.

Silicon Photonics

IBM has been a pioneer in the area of CMOS integrated silicon photonics for over 12 years, a technology that integrates functions for optical communications on a silicon chip, and the IBM team has recently designed and fabricated the world's first monolithic silicon photonics based transceiver with wavelength division multiplexing.  Such transceivers will use light to transmit data between different components in a computing system at high data rates, low cost, and in an energetically efficient manner.
Silicon nanophotonics takes advantage of pulses of light for communication rather than traditional copper wiring and provides a super highway for large volumes of data to move at rapid speeds between computer chips in servers, large datacenters, and supercomputers, thus alleviating the limitations of congested data traffic and high-cost traditional interconnects.

Businesses are entering a new era of computing that requires systems to process and analyze, in real-time, huge volumes of information known as Big Data. Silicon nanophotonics technology provides answers to Big Data challenges by seamlessly connecting various parts of large systems, whether few centimeters or few kilometers apart from each other, and move terabytes of data via pulses of light through optical fibers.
III-V technologies
IBM researchers have demonstrated the world’s highest transconductance on a self-aligned III-V channel metal-oxide semiconductor (MOS) field-effect transistors (FETs) device structure that is compatible with CMOS scaling. These materials and structural innovation are expected to pave path for technology scaling at 7nm and beyond.  With more than an order of magnitude higher electron mobility than silicon, integrating III-V materials into CMOS enables higher performance at lower power density, allowing for an extension to power/performance scaling to meet the demands of cloud computing and big data systems.

Carbon Nanotubes

IBM Researchers are working in the area of carbon nanotube (CNT) electronics and exploring whether CNTs can replace silicon beyond the 7 nm node.  As part of its activities for developing carbon nanotube based CMOS VLSI circuits, IBM recently demonstrated -- for the first time in the world -- 2-way CMOS NAND gates using 50 nm gate length carbon nanotube transistors.

IBM also has demonstrated the capability for purifying carbon nanotubes to 99.99 percent, the highest (verified) purities demonstrated to date, and transistors at 10 nm channel length that show no degradation due to scaling--this is unmatched by any other material system to date.

Carbon nanotubes are single atomic sheets of carbon rolled up into a tube. The carbon nanotubes form the core of a transistor device that will work in a fashion similar to the current silicon transistor, but will be better performing. They could be used to replace the transistors in chips that power data-crunching servers, high performing computers and ultra fast smart phones.

Carbon nanotube transistors can operate as excellent switches at molecular dimensions of less than ten nanometers – the equivalent to 10,000 times thinner than a strand of human hair and less than half the size of the leading silicon technology. Comprehensive modeling of the electronic circuits suggests that about a five to ten times improvement in performance compared to silicon circuits is possible.

Graphene

Graphene is pure carbon in the form of a one atomic layer thick sheet.  It is an excellent conductor of heat and electricity, and it is also remarkably strong and flexible.  Electrons can move in graphene about ten times faster than in commonly used semiconductor materials such as silicon and silicon germanium. Its characteristics offer the possibility to build faster switching transistors than are possible with conventional semiconductors, particularly for applications in the handheld wireless communications business where it will be a more efficient switch than those currently used.
Recently in 2013, IBM demonstrated the world's first graphene based integrated circuit receiver front end for wireless communications. The circuit consisted of a 2-stage amplifier and a down converter operating at 4.3 GHz.

Next Generation Low Power Transistors

In addition to new materials like CNTs, new architectures and innovative device concepts are required to boost future system performance. Power dissipation is a fundamental challenge for nanoelectronic circuits.

A potential alternative to today’s power hungry silicon field effect transistors are so-called steep slope devices. They could operate at much lower voltage and thus dissipate significantly less power. IBM scientists are researching tunnel field effect transistors (TFETs). In this special type of transistors the quantum-mechanical effect of band-to-band tunneling is used to drive the current flow through the transistor. TFETs could achieve a 100-fold power reduction over complementary CMOS transistors, so integrating TFETs with CMOS technology could improve low-power integrated circuits.

Recently, IBM has developed a novel method to integrate III-V nanowires and heterostructures directly on standard silicon substrates and built the first ever InAs/Si tunnel diodes and TFETs using InAs as source and Si as channel with wrap-around gate as steep slope device for low power consumption applications.

"In the next ten years computing hardware systems will be fundamentally different as our scientists and engineers push the limits of semiconductor innovations to explore the post-silicon future," said Tom Rosamilia, senior vice president, IBM Systems and Technology Group. "IBM Research and Development teams are creating breakthrough innovations that will fuel the next era of computing systems."

SOURCE  IBM

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 Moore's Law  

Researchers have developed a new technique in silicon photonics that could allow for exponential improvement in microprocessors to continue well into the future. By using light waves instead of electrical wires for microprocessor communication the breakthrough could eliminate some of the limitations now faced by conventional microprocessors.

A pair of breakthroughs in the field of silicon photonics by DARPA-funded researchers at the University of Colorado Boulder, the Massachusetts Institute of Technology and Micron Technology Inc. could allow for the trajectory of exponential improvement in microprocessors that began nearly half a century ago—the famous Moore’s Law—to continue well into the future, allowing for increasingly faster electronics, from supercomputers to laptops to smartphones.

The research team, led by CU-Boulder researcher Milos Popovic, an assistant professor of electrical, computer and energy engineering, developed a new technique that allows microprocessors to use light, instead of electrical wires, to communicate with transistors on a single chip, a system that could lead to extremely energy-efficient computing and a continued skyrocketing of computing speed into the future.

Popovic and his colleagues created two different optical modulators—structures that detect electrical signals and translate them into optical waves—that can be fabricated within the same processes already used in industry to create today’s state-of-the-art electronic microprocessors. The modulators are described in a recent issue of the journal Optics Letters.

First laid out in 1965, Moore’s Law predicted that the size of the transistors used in microprocessors could be shrunk by half about every two years for the same production cost, allowing twice as many transistors to be placed on the same-sized silicon chip. The net effect would be a doubling of computing speed every couple of years.

The projection has held true until relatively recently. While transistors continue to get smaller, halving their size today no longer leads to a doubling of computing speed. That’s because the limiting factor in microelectronics is now the power that’s needed to keep the microprocessors running. The vast amount of electricity required to flip on and off tiny, densely packed transistors causes excessive heat buildup.

“The transistors will keep shrinking and they’ll be able to continue giving you more and more computing performance,” Popovic said. “But in order to be able to actually take advantage of that you need to enable energy-efficient communication links.”

Microelectronics also are limited by the fact that placing electrical wires that carry data too closely together can result in “cross talk” between the wires.

In the last half-dozen years, microprocessor manufacturers, such as Intel, have been able to continue increasing computing speed by packing more than one microprocessor into a single chip to create multiple “cores.” But that technique is limited by the amount of communication that then becomes necessary between the microprocessors, which also requires hefty electricity consumption.

Using light waves instead of electrical wires for microprocessor communication functions could eliminate the limitations now faced by conventional microprocessors and extend Moore’s Law into the future, Popovic said.

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Optical communication circuits, known as photonics, have two main advantages over communication that relies on conventional wires: Using light has the potential to be brutally energy efficient, and a single fiber-optic strand can carry a thousand different wavelengths of light at the same time, allowing for multiple communications to be carried simultaneously in a small space and eliminating cross talk.

Optical communication is already the foundation of the Internet and the majority of phone lines. But to make optical communication an economically viable option for microprocessors, the photonics technology has to be fabricated in the same foundries that are being used to create the microprocessors. Photonics have to be integrated side-by-side with the electronics in order to get buy-in from the microprocessor industry, Popovic said.

“In order to convince the semiconductor industry to incorporate photonics into microelectronics you need to make it so that the billions of dollars of existing infrastructure does not need to be wiped out and redone,” Popovic said.

Last year, Popovic collaborated with scientists at MIT to show, for the first time, that such integration is possible. “We are building photonics inside the exact same process that they build microelectronics in,” Popovic said. “We use this fabrication process and instead of making just electrical circuits, we make photonics next to the electrical circuits so they can talk to each other.”

In two papers published last month in Optics Letters with CU-Boulder postdoctoral researcher Jeffrey Shainline as lead author, the research team refined their original photonic-electronic chip further, detailing how the crucial optical modulator, which encodes data on streams of light, could be improved to become more energy efficient. That optical modulator is compatible with a manufacturing process—known as Silicon-on-Insulator Complementary Metal-Oxide-Semiconductor, or SOI CMOS—used to create state-of-the-art multicore microprocessors such as the IBM Power7 and Cell, which is used in the Sony PlayStation 3.

The researchers also detailed a second type of optical modulator that could be used in a different chip-manufacturing process, called bulk CMOS, which is used to make memory chips and the majority of the world’s high-end microprocessors.

“This innovation could enable optical processor to memory interconnects in supercomputers within five years, and likely within consumer electronics like game consoles, cell phones, as well,” Popovic told KurzweilAI. “Chips enabled with optical processing could also impact an array of other areas, including medical imaging, advanced analog signal processing like analog to digital conversion, etc. The bottom line is that optics is becoming an essential part of advanced microelectronics as performance continues to scale.



SOURCE  University of Colorado Boulder

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